The Semiconductor Longevity Benchmark 2026

Red illustration of a semiconductor chip with circuit traces, cover of the Detus Semiconductor Longevity Benchmark 2026

Executive summary

Long-lived electronic products are frequently designed around semiconductor components whose commercial, manufacturing and supply-chain lifecycles are governed by rules that differ substantially between vendors. A headline such as “10-year longevity” can describe a formal minimum availability program, a planned availability horizon, a portfolio policy, or a typical historical lifecycle. These claims are not equivalent.

In the audited timing cohort assembled for this report, 48 verified discontinuation events across 16 manufacturers produced a median notice-to-last-time-buy window of 6.0 months and a median notice-to-final-shipment window of 12.2 months. The interquartile ranges were 5.6–6.3 months to Last Time Buy (LTB) and 12.0–15.8 months to final shipment. These are descriptive results from a public-data convenience cohort, not industry-wide population estimates.

The broader research shows that the most important distinction is not simply how many months a component has left. The exit path matters. Some products receive a normal last-time-buy period backed by continued production, while others become inventory-constrained, stock-only, non-manufacturable, or are withdrawn with no practical lifetime-buy opportunity. Treating all of these outcomes as a single continuous “EOL runway” variable hides materially different engineering and procurement risks.

Replacement information is equally heterogeneous. A manufacturer-listed replacement can be explicitly pin-compatible, functionally equivalent but pin-incompatible, an architectural successor requiring hardware and firmware migration, still in development, or merely a reference suggestion that must be qualified by the customer. The report therefore separates replacement availability from replacement readiness and engineering migration burden.

A recurring result across unrelated manufacturers is that semiconductor obsolescence is often driven several layers upstream from the selected part: foundry closures, legacy process technology, aging wafer equipment, test platforms, assembly partners, substrates, specialty materials, regulatory transitions and upstream die suppliers. Component selection is therefore a lifecycle architecture decision rather than a purchasing decision made at the end of development.

Core finding. A ten-year product can still face a six-month component decision. Long-term design risk depends on the availability commitment, exit path, supply certainty, upstream manufacturing exposure and replacement burden.
Horizontal bar chart of the 69-manufacturer screening universe by segment: sensors, automotive and specialty (14), power and discrete (13), RF, connectivity and embedded (12), memory (10), compute and programmable logic (10), MCU, analog and mixed-signal (10)
Figure 1. Composition of the 69-manufacturer screening universe by product segment. The screening universe is broader than the quantitative timing cohort.

Research design and methodology

The benchmark uses a primary-source-first protocol. Manufacturer lifecycle pages, longevity programs, official PCN/PDN/PTN archives, product pages and manufacturer-issued discontinuation notices are preferred. JEDEC and IEC are used for standard context. Authorized distributor mirrors are used only when they reproduce an identifiable manufacturer-issued document.

  • Manufacturer-level analysis records what lifecycle information is publicly discoverable before a component is selected.
  • Event-level analysis records notice date, exit-path classification, last-time-buy, final shipment, primary cause and cause flags.
  • Part-level analysis records replacement availability, readiness, compatibility evidence and migration severity when the notice exposes those fields.
  • Latest-five discontinuation events are preferred when a manufacturer exposes a complete chronological archive. If fewer than five qualifying events are publicly verifiable, all qualifying events are used. Ties at the chronological cutoff are retained rather than arbitrarily discarded.
  • Archive year or page grouping is never used as a proxy for manufacturer notice date. The manufacturer-issued notice date is authoritative.
  • Records with apparent date anomalies are not automatically discarded. They are first checked for stock-only, no-LTB or inventory-constrained semantics.

The 48-event timing cohort used in the quantitative charts is an audited convenience cohort assembled only from events for which notice, LTB and final-shipment dates were explicitly verifiable in the public evidence gathered during this study. It should not be interpreted as a random sample of all semiconductor EOLs. Standards context: JEDEC J-STD-048 and IEC 62402.

Three denominators, three different questions

A recurring source of confusion in lifecycle benchmarking is denominator choice. This report keeps manufacturer-weighted, event-weighted and part-weighted analyses separate.

UnitBest used forExample question
ManufacturerTransparency and policyHow many manufacturers publish a public EOL archive?
EventWithdrawal processHow often did an observed EOL event offer a standard LTB window?
PartReplacement / redesign exposureHow many affected orderable parts had a listed or pin-compatible replacement?

The manufacturer landscape

The screening universe spans major integrated device manufacturers, fabless analog and connectivity suppliers, memory vendors, programmable-logic companies, RF specialists and sensor vendors. Inclusion in the screening universe means the manufacturer was evaluated under the same public-source protocol. It does not imply that the same quantitative metrics are available for every company.

Public-data quality varies materially. Some manufacturers expose searchable historical archives with notice dates, LTB, LTS, reason and replacement data. Others publish lifecycle policies but require customer portals for individual notices. A third group exposes product status but no structured public discontinuation history could be located under the documented search protocol.

Evidence tierDefinitionUse in this report
APublic event-level evidence supports at least one quantitative metricEligible for event/part analysis where fields are complete
BPublic lifecycle or policy evidence is strong, but event-level extraction is incompletePolicy and transparency analysis
CManufacturer screened; no sufficiently structured public event evidence locatedTransparency result only; no inference about customer-facing private notices

There is no standard definition of semiconductor longevity

The research found several distinct policy models. The language often sounds comparable at first glance, but the underlying commitment structure differs.

ManufacturerPublic modelInterpretation
Texas InstrumentsTypical lifecycle + anti-obsolescence conditionsTI states that product lifecycles are typically 10–15 years and often longer, with explicit conditions that protect standard products from obsolescence.
NXPFormal Product Longevity ProgramParticipating products receive 10- or 15-year minimum periods that can be extended; expiration does not automatically mean discontinuation.
STMicroelectronicsFormal 7 / 10 / 15 / 20-year commitmentsCovered products are assigned defined longevity commitments by program.
MicrochipContinuity-oriented portfolio policyMicrochip emphasizes maintaining older products where reasonably possible and publishes EOL policies and notices.
InfineonPlanned availability horizonsProduct-specific tables publish availability planned until at least a given date, subject to stated caveats.
RenesasProduct-specific PLPProducts in the program receive a published longevity period while participating.
QorvoForward availability for selected longevity productsThe longevity page publishes launch date and committed availability date for selected products.

Selected official references: Texas Instruments, NXP, STMicroelectronics, Microchip, Infineon, Renesas and Qorvo.

Interpretation. A “10-year program”, a “typical 10–15-year lifecycle”, and “planned availability until 2030” are different forms of evidence. The benchmark therefore compares policy structure before it compares headline years.

How semiconductor products actually leave the market

The research identified four operationally different exit paths. This distinction is essential because a published LTB date does not always imply continued production or dependable supply.

Exit pathWhat it meansEngineering implication
Standard fixed LTBA defined final-order date with normal production / fulfillment mechanicsThe cleanest basis for timing analysis
Capacity constrainedA final-order date exists, but quantities or capacity may be limitedPublished runway can overstate practical supply certainty
Inventory constrained / stock onlyOrders are accepted only while finished goods or existing inventory remainsDate alone is insufficient; inventory depletion can end supply earlier
No LTB / non-manufacturableNo conventional lifetime-buy opportunity is offeredImmediate redesign, alternative sourcing or product-level mitigation may be required

Central Semiconductor provides direct examples of immediate “Stock Only” withdrawal in which orders can only be accepted against inventory already on hand. Analog Devices PDN 25_0093 explicitly describes a discontinuation with no lifetime-buy option, while NXP notices can mark specific products as non-manufacturable when no supply or inventory exists.

The last-time-buy benchmark

Among the 48 verified events in the audited timing cohort, the median notice-to-LTB interval was 6.0 months. The middle 50% of events fell between 5.6 and 6.3 months. The timing distribution is visibly multi-modal: several vendors cluster near six months, while some events are substantially shorter or longer.

Dot plot of months from notice to last-time-buy for 48 verified discontinuation events across 16 manufacturers, with a dashed line at the overall median of 6.0 months
Figure 2. Notice-to-last-time-buy distribution for the 48-event audited timing cohort. Dots are individual events; the dashed line is the overall cohort median. The cohort is descriptive and non-random.

The median notice-to-final-shipment interval was 12.2 months, with an interquartile range of 12.0–15.8 months. Final-shipment windows are generally longer than LTB windows, but the practical value of that additional time depends on whether a customer secured enough material before the order window closed.

Dot plot of months from notice to final shipment for the same 48 verified events, with a dashed line at the overall median of 12.2 months
Figure 3. Notice-to-final-shipment distribution for the same audited cohort. Long final-shipment horizons should not be interpreted as an extended ordering window.

Vendor-level descriptive medians

ManufacturerEventsMedian to LTBMedian to final shipment
TDK InvenSense23.4 mo9.6 mo
Alliance Memory23.4 mo9.3 mo
Toshiba13.7 mo15.7 mo
Diodes Incorporated23.8 mo11.3 mo
Skyworks25.0 mo14.0 mo
MaxLinear15.5 mo11.5 mo
NXP45.8 mo14.9 mo
Texas Instruments56.0 mo12.0 mo
ams OSRAM36.0 mo12.0 mo
onsemi46.0 mo12.0 mo
Renesas56.2 mo18.2 mo
Silicon Labs36.2 mo12.2 mo
STMicroelectronics56.3 mo12.2 mo
Nuvoton36.8 mo12.8 mo
Nordic Semiconductor17.2 mo13.1 mo
Infineon59.3 mo18.1 mo

These are medians of the observed events in this research cohort, not manufacturer-wide service-level guarantees and not a ranking.

Why semiconductors become obsolete

The public notices repeatedly show that low demand is only one route to discontinuation. Product availability can be terminated by manufacturing constraints that sit several layers upstream from the customer-visible part number.

Diagram of where semiconductor obsolescence can originate: product architecture, semiconductor vendor, foundry or fab, process and tooling, assembly and package, and materials or upstream die
Figure 4. Simplified dependency chain. Lifecycle risk can originate at the vendor, foundry, fab, process, tooling, assembly, package or material layer.
Cause familyTypical mechanismVerified examples in research
Demand / portfolioLow demand, utilization or portfolio rationalizationAlliance Memory, NXP, onsemi and others
Process technologyLegacy wafer process or technology reaches EOLADI, ST, Infineon, NXP
Fab / site closureFoundry or internal fab closes / is consolidatedNXP, ams OSRAM-linked cases
Test infrastructureTester or handler becomes unsupportedSkyworks, Silicon Labs, Teledyne e2v
Assembly / OSATExternal assembly line or partner ends supportADI, Renesas
Material / supplierSpecialty material, leadframe, substrate or raw material disappearsNordic, Cirrus Logic, Skyworks
Regulatory transitionMaterials or variants withdrawn to meet regulatory / sustainability requirementsNordic, TI
Successor generationPortfolio moves to a newer architecture / package / generationInfineon, Wolfspeed

One of the clearest patterns is tooling and test infrastructure. Silicon Labs published an EOL in 2026 after the supplier of the handler used for device testing stopped supporting the equipment. Teledyne e2v has documented EOL caused by termination of test equipment. Skyworks has documented a 20-year product family ending because a supplier was phasing out chip-bump and tester infrastructure while volumes no longer justified the investment required to sustain the family.

Cascaded obsolescence

Obsolescence can propagate between suppliers. Teledyne e2v documented a processor-family EOL linked to an NXP discontinuation that itself followed the termination of silicon production lines at GlobalFoundries. In other downstream cases, storage products were discontinued because Kioxia flash components were being retired. The practical implication is that a semiconductor vendor can inherit lifecycle risk from another semiconductor supplier or foundry.

Design implication. A BOM risk register that stops at the immediate manufacturer misses part of the real dependency graph. High-coupling components deserve upstream manufacturing scrutiny during architecture selection.

Replacement does not mean drop-in

Manufacturer notices use the word replacement with very different meanings. Some vendors explicitly publish pin-to-pin compatibility. Others identify a functional successor but warn that package, pinout or performance may differ. A replacement can also be unavailable at the time the EOL notice is issued.

Detus migration severity taxonomy from R0 (explicitly pin-compatible drop-in) through R1 to R5 (increasing hardware, firmware and architecture migration burden) to RX (no manufacturer-listed replacement)
Figure 5. Detus migration severity taxonomy. Severity describes documented engineering burden, not manufacturer quality.

NXP explicitly states that a replacement designation is reference information and does not guarantee the same form, fit, function or performance until the customer qualifies the product. MaxLinear separates “functional equivalent” and “pin compatible” into distinct fields. TDK InvenSense has published an EOL with “No pin-to-pin replacement” and a recommended two-device alternative.

A within-vendor contrast: Analog Devices

Analog Devices provides one of the clearest demonstrations that the cause of EOL can predict migration burden. In package/material-oriented discontinuations, ADI notices often identify pin-compatible replacement variants. In PDN 24_0080, however, a TSMC SRAM process EOL forced migration from ADSP-21065L variants to a newer device, and the notice explicitly states that the suggested replacement requires software and hardware redesign.

This contrast supports a directional hypothesis for future part-level analysis: administrative, packaging and material transitions are more likely to preserve an implementation path than silicon/process obsolescence. The present dataset is not large or normalized enough to publish a universal probability of redesign by cause.

Replacement readiness

Replacement availability and replacement readiness are distinct variables. Alliance Memory’s 2026 LPDDR4X discontinuation identifies alternatives, but the replacement for one density had not yet been released while other alternatives were already in mass production. That makes a simple replacement-coverage percentage potentially misleading.

The benchmark therefore records whether a listed alternative is available, in development, contact-manufacturer, absent or unknown. Ampleon’s discontinued and replacement parts list is one example of a public replacement register.

Lifecycle transparency benchmark

The 69-manufacturer screen shows large differences in what an engineer can verify without a sales relationship or customer portal. The report does not convert this into a weighted score. Instead, transparency should be read as a disclosure matrix.

ManufacturerLifecycle statesLongevity programPublic EOL archiveHistorical accessNotice dateLTBLTSReasonReplacementCompatibilityForward horizon
Nuvoton
Nordic Semiconductor
MaxLinear
QorvoPartialPartialPartialPartial
pSemiPartialPartial
MicrochipPartial
Analog Devices
Lattice SemiconductorPartialPartialPartialPartial

This matrix is illustrative of the disclosure dimensions used across the full screening universe. “Partial” means the field exists for some products or notices but is not consistently available in a public structured source.

Nuvoton is a particularly clean example: its public EOL page exposes notification date, last order, last shipment and recommended replacement in a structured table. Nordic exposes a chronological PDN index. MaxLinear’s notices can distinguish functional equivalence from pin compatibility. Qorvo combines lifecycle status with a separate forward-looking longevity program.

The Detus Lifecycle Assurance Framework

The research does not justify collapsing lifecycle exposure into an arbitrary 0–100 score. The framework keeps five engineering dimensions visible so that a design team can see what type of risk is being accepted.

DimensionEngineering questionWhy it matters
A · Availability horizonWhat formal longevity commitment, planned-availability horizon or product status is publicly documented?Separates headline longevity language from the evidence that actually exists.
E · Exit-path riskIf the part is withdrawn, is the path standard LTB, capacity-constrained, inventory-only or no-LTB?Distinguishes a dependable planning window from a date that can disappear with inventory.
S · Supply-chain exposureWhich foundry, fab, process, test, assembly, package, material or upstream supplier dependencies matter?Makes hidden upstream dependencies visible before they become emergency redesigns.
R · Replacement burdenIs the alternative R0, R1, R2, R3, R4, R5 or RX, and how strong is the compatibility evidence?Prevents a listed replacement from being mistaken for a drop-in solution.
U · Update / qualification impactWhat firmware, PCB, EMC, safety, compliance, validation and production-documentation work would the migration trigger?Captures the downstream work that often dominates the true cost of obsolescence.

Engineering playbook for ten-year products

  • Select high-coupling components with lifecycle architecture in mind. MCUs, processors, PMICs, memory, RF devices and sensors can create firmware, board and qualification work disproportionate to their BOM value.
  • Capture the manufacturer’s lifecycle model in the design record. Record whether the evidence is a formal minimum commitment, planned availability, a portfolio policy or merely the current lifecycle status.
  • Subscribe to the manufacturer’s PCN/PDN service before design freeze and assign ownership for lifecycle monitoring.
  • For critical parts, document the exit-path assumption. A six-month production-backed LTB and a twelve-month inventory-constrained LTB are not equivalent.
  • Record replacement evidence at selection time. Prefer parts and vendors that expose package, pin and compatibility information when possible.
  • Map upstream manufacturing dependencies for sole-source or hard-to-migrate parts. Mature process nodes, unique test platforms, specialist packages and external assembly partners deserve attention.
  • Design migration boundaries into the product. Clean hardware abstraction, reproducible firmware builds, controlled interfaces and modular power/RF subsystems reduce future redesign scope.
  • Review lifecycle exposure at major gates: architecture freeze, EVT/DVT, certification, production release and recurring annual sustaining-engineering reviews.
Detus tip. The cheapest lifecycle redesign is the one considered before the PCB, firmware architecture and certification plan are frozen.

Conclusion

The benchmark changes the way component longevity should be framed. Availability is only the first layer. Once a product begins to exit the market, the engineering consequences depend on the exit path, the reliability of the remaining supply, the upstream reason for discontinuation and the migration burden of the replacement.

For long-lived electronic products, a component with a credible forward availability commitment, a transparent discontinuation process and a documented migration path can be materially safer than a nominally similar component whose lifecycle information is opaque. The decision belongs in architecture, not only in procurement.

Ready to build it right from day one?

Let's turn your project into something real, without the guesswork.

Talk To Us